Abstract
We propose an embedded multiprocessor architecture and its associated thread-based programming model. Using a cycle-true simulation model of this architecture, we are able to estimate energy savings for a threaded C program. The savings are obtained by voltage- and frequency-scaling of the individual processors. We port a fingerprint minutiae detection application onto this architecture, and show the resulting performance on single-, dual-, and quad-processor configurations. The energy-scaled quad-processor version results in a 77% energy reduction over the single-processor non-scaled implementation, at only a 2.2% degradation in cycle count.
Original language | English |
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Article number | 3.4 |
Pages (from-to) | 27-30 |
Number of pages | 4 |
Journal | Proceedings - Design Automation Conference |
DOIs | |
State | Published - 1 Dec 2005 |
Event | 42nd Design Automation Conference, DAC 2005 - Anaheim, CA, United States Duration: 13 Jun 2005 → 17 Jun 2005 |
Keywords
- Design
- Performance