Constraint generation for software-based post-silicon bug masking with scalable resynthesis technique for constraint optimization

Chia Wei Chang*, Hong Zu Chou, Kai Hui Chang, Jie Hong Roland Jiang, Chien-Nan Liu, Chiu Han Hsiao, Sy Yen Kuo

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification efforts and be detected after tape-out. While most existing solutions focus on fixing the problem on the hardware, in this work we propose a different methodology that tries to generate constraints which can be used to mask the bugs using software. This is achieved by utilizing formal reachability analysis to extract the conditions that can trigger the bugs. By synthesizing the bug conditions, we can derive input constraints for the software so that the hardware bugs will never be exposed. In addition, we observe that such constraints have special characteristics: they have small onset terms and flexible minterms. To facilitate the use of our methodology, we also propose a novel resynthesis technique to reduce the complexity of the constraints. In this way, software can be modified to run correctly on the buggy hardware, which can improve system quality without the high cost of respin.

Original languageEnglish
Title of host publicationProceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011
Pages174-181
Number of pages8
DOIs
StatePublished - 22 Jun 2011
Event12th International Symposium on Quality Electronic Design, ISQED 2011 - Santa Clara, CA, United States
Duration: 14 Mar 201116 Mar 2011

Publication series

NameProceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011

Conference

Conference12th International Symposium on Quality Electronic Design, ISQED 2011
CountryUnited States
CitySanta Clara, CA
Period14/03/1116/03/11

Keywords

  • Bug repair
  • bug masking
  • logic synthesis

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    Chang, C. W., Chou, H. Z., Chang, K. H., Jiang, J. H. R., Liu, C-N., Hsiao, C. H., & Kuo, S. Y. (2011). Constraint generation for software-based post-silicon bug masking with scalable resynthesis technique for constraint optimization. In Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011 (pp. 174-181). [5770722] (Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011). https://doi.org/10.1109/ISQED.2011.5770722