Comprehensive examination of threshold voltage fluctuations in nanoscale planar MOSFET and bulk FinFET devices

Chih Hong Hwang*, Hui Wen Cheng, Ta Ching Yeh, Tien Yeh Li, Hsuan Ming Huang, Yiming Li

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Intrinsic fluctuations on device characteristics, such as the threshold voltage (Vth) fluctuation is crucial in determining the behavior of nanoscale semiconductor devices. In this paper, the dependency of process-variation and random-dopant-induced Vth fluctuation on the gate oxide thickness scaling in 16 nm metal-oxide-semiconductor field effect transistors (MOSFETs) is investigated. Fluctuations of the threshold voltage for the studied planar MOSFETs with equivalent oxide thicknesses (EOT) from 1.2 nm to 0.2 nm (e.g., SiO2 for the 1.2 and 0.8 nm EOTs, Al2O3 for the 0.4 nm EOT and HfO2 for the 0.2 nm EOT) are then for the first time compared with the results of 16nm bulk fin-typed filed effect transistors (FinFETs), which is one of the promising candidates for next generation semiconductor devices. An experimentally validated simulation is conducted to investigate the fluctuation property. Result of this study confirms the suppression of Vth fluctuations with the gate oxide thickness scaling (using high-K dielectric). It's found that the immunity of the planar MOSFET against fluctuation suffers from nature of structural limitations. Bulk FinFETs alleviate the challenges of device's scaling and have potential in the nanoelectronics application.

Original languageEnglish
Title of host publicationTechnical Proceedings of the 2008 NSTI Nanotechnology Conference and Trade Show, NSTI-Nanotech, Nanotechnology 2008
Pages647-650
Number of pages4
StatePublished - 2008
Event2008 NSTI Nanotechnology Conference and Trade Show, NSTI Nanotech 2008 Joint Meeting, Nanotechnology 2008 - Quebec City, QC, United States
Duration: 1 Jun 20085 Jun 2008

Publication series

NameTechnical Proceedings of the 2008 NSTI Nanotechnology Conference and Trade Show, NSTI-Nanotech, Nanotechnology 2008
Volume3

Conference

Conference2008 NSTI Nanotechnology Conference and Trade Show, NSTI Nanotech 2008 Joint Meeting, Nanotechnology 2008
CountryUnited States
CityQuebec City, QC
Period1/06/085/06/08

Keywords

  • Gate-length deviation
  • Line-edge roughness
  • Modeling and simulation
  • Process-variation
  • Random dopant
  • Threshold voltage fluctuation

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