Comprehensive Analysis on Electrical Characteristics of Pi-Gate Poly-Si Junctionless FETs

Dong Ru Hsieh, Jer Yi Lin, Po Yi Kuo, Tien-Sheng Chao*

*Corresponding author for this work

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

In this paper, the electrical characteristics of the Pi-gate junctionless FETs (PG JL FETs) with the in situ n+ doped poly-Si (DP-Si) fin-channels have been experimentally investigated and comprehensively discussed. The subthreshold behavior and threshold voltage of the PG JL FETs are sensitive to the channel dimensions, especially the channel width. The crystallinity, carrier mobility, and effective carrier concentration in the DP-Si films are dependent on the initial DP-Si film thicknesses, which directly influence the on current and threshold voltage of the PG JL FETs. Based on an evaluation on the subthreshold behavior and the driving current, we found that the PG JL FETs with the low/high aspect ratio (A.R. = channel thickness/channel width) are separately suitable for the low-power/high-performance applications. Among these PG JL FETs, the device with a proper A.R. (3.35) exhibits a relatively steep subthreshold swing (S.S.) of 66 mV/decade and the highest ON/OFF currents ratio (I ON I OFF) of 1.2× 10-8 (VD =1V). These devices are very promising candidates for future multifunctional 3-D integrated circuit applications.

Original languageEnglish
Article number7934337
Pages (from-to)2992-2998
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume64
Issue number7
DOIs
StatePublished - 1 Jul 2017

Keywords

  • Carrier mobility
  • channel dimension
  • crystallinity
  • effective carrier concentration
  • junctionless (JL)
  • multifunctional 3-D ICs
  • Pi-gate (PG)
  • poly-Si

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