This paper presents a novel technique to reduce the area of the hardwired lookup table (LUT) of DA-based FIR filters. It explores the optimal quantization on the real-valued LUT with optimal global scaling and error distribution, and we apply an effective error measure to estimate the quantization error on the FIR coefficients. Our approach enables designers to explicitly trade the quality for simple implementations at finer granularity than that solely by reducing the coefficient wordlengths. Moreover, in our simulations, the proposed method can save 30%-40% silicon area of conventional DA-based FIR filters under identical error constraints.
|Number of pages||4|
|State||Published - 1 Dec 2004|
|Event||2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan|
Duration: 6 Dec 2004 → 9 Dec 2004
|Conference||2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology|
|Period||6/12/04 → 9/12/04|