Thin-body transistors with silicide source/drains were fabricated with gate-lengths down to 15nm. Complementary low-barrier silicides were used to reduce contact and series resistance. Minimum gate-length transistors with Tox=40Å show PMOS |Idsat|=270μA/μm and NMOS |Idsat|=190μA/μm with Vds=1.5V, |Vg-Vt|=1.2V and, Ion/Ioff>104. A simple transmission model, fitted to experimental data, is used to investigate effects of oxide scaling and extension doping.
|Number of pages||3|
|Journal||Technical Digest - International Electron Devices Meeting|
|State||Published - 1 Dec 2000|
|Event||2000 IEEE International Electron Devices Meeting - San Francisco, CA, United States|
Duration: 10 Dec 2000 → 13 Dec 2000