Complementary metal-oxide-silicon field-effect transistors fabricated in 4-MeV boron-implanted silicon

K. W. Terrill*, P. F. Byrne, Chen-Ming Hu, N. W. Cheung

*Corresponding author for this work

Research output: Contribution to journalArticle

14 Scopus citations

Abstract

Boron was implanted into p-type (100) silicon at an energy of 4 MeV to create a layer of heavily doped silicon centered at a depth of 5.2 μm below the surface. Both n-channel and p-channel metal-oxide-silicon, field-effect transistors (MOSFET's) and various diode structures were fabricated over this implanted region by using a 3-μm complementary MOSFET (CMOS) technology. The results show that the implanted silicon is recrystallized to a device quality state. No increase in diode leakage or degradation in MOSFET device characteristics is observed. Experimental results show that this subdevice buried layer leads to a reduction of CMOS latch-up susceptibility.

Original languageEnglish
Pages (from-to)977-979
Number of pages3
JournalApplied Physics Letters
Volume45
Issue number9
DOIs
StatePublished - 1 Dec 1984

Fingerprint Dive into the research topics of 'Complementary metal-oxide-silicon field-effect transistors fabricated in 4-MeV boron-implanted silicon'. Together they form a unique fingerprint.

  • Cite this