CMOS transistor reliability and performance impacted by gate microstructure

Bin Yu*, Tsu Jae King, Chen-Ming Hu, Dong Hyuk Ju, Nick Kepler

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations

Abstract

This paper investigate the impact of CMOS (complementary metal-oxide-semiconductor) gate microstructure on the reliability and performance of deep-submicronmeter CMOS transistors. The amorphous silicon (α-Si) gate provides better capability to suppress boron penetration in p+ doped gate p-channel MOSFET's, but gate depletion in α-Si gate is slightly more severe than that of the poly-Si gate. The gate-length-dependent gate-depletion effect, in which the difference of linear g m between MOSFET's with two different gate microstructure shows a strong L g-dependence, is reported and interpreted by the impurity diffusion along the grain boundary. Gate nitrogen implant as an effective way to suppress the boron diffusion is also discussed with emphasis on the impact on both device reliability and performance.

Original languageEnglish
Pages35-41
Number of pages7
DOIs
StatePublished - 1 Dec 1997
EventProceedings of the 1997 IEEE International Integrated Reliability Workshop - Tahoe, CA, USA
Duration: 13 Oct 199716 Oct 1997

Conference

ConferenceProceedings of the 1997 IEEE International Integrated Reliability Workshop
CityTahoe, CA, USA
Period13/10/9716/10/97

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