CMOS technology for 1.8 V and beyond

Jack Y.C. Sun*

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

Abstract

We present the technology trend and attributes of 1.8 V and lower VDD CMOS ULSI for future high-performance and low-power applications. Key technology challenges and opportunities such as thin gate dielectric, multiple/tunable Vt, SOI, mixed-voltage I/O interface, low operating temperature, and embedded system-on-a-chip features, will be addressed.

Original languageEnglish
Pages293-297
Number of pages5
StatePublished - 1997
EventProceedings of the 1997 International Symposium on VLSI Technology, Systems, and Applications - Taipei, China
Duration: 3 Jun 19975 Jun 1997

Conference

ConferenceProceedings of the 1997 International Symposium on VLSI Technology, Systems, and Applications
CityTaipei, China
Period3/06/975/06/97

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