Abstract
To enable CMOS prescaler(s) for submillimeter-wave radio-frequency synthesis, we present a new dynamic frequency divider topology according to a time-interleaved dual-injection locking scheme. Consequently, the prototype prescalers implemented with 65-nm CMOS technology have demonstrated ultrahigh operation speeds up to 208 GHz, with ultrawide locking range up to 37 GHz, with 2.5-mW power consumption. The achieved performance figure of merit (FOM) [i.e., (speed × range)/power in GHz2/mW] is roughly an order of magnitude higher than that of the state of the art.
Original language | English |
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Article number | 5934371 |
Pages (from-to) | 393-397 |
Number of pages | 5 |
Journal | IEEE Transactions on Circuits and Systems I: Regular Papers |
Volume | 58 |
Issue number | 7 |
DOIs | |
State | Published - 1 Jul 2011 |
Keywords
- CMOS prescaler
- injection locking frequency divider
- submillimeter wave circuits
- wide locking range