CMOS low-noise amplifier with shunt-peaking load for group 1-3 MB-OFDM ultra-wideband wireless receiver

Zhe Yang Huang*, Che Cheng Huang, Chun Chieh Chen, Chung-Chih Hung, Christina F. Jou

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

In this paper, a CMOS low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver system. The design consists of a wideband input impedance matching network, two stage cascode amplifiers with shunt-peaking load and an output buffer for measurement purpose. It was fabricated in UMC 0.18um standard RF CMOS process. The LNA provides 14.1dB maximum power gain between 2.3GHz-8.0GH while consuming 18.6mW (including buffer) through a 1.8V supply. Over the 3.1GHz-8.0GHz frequency band, a minimum noise figure is 2.0dB. The input return loss is lower than - 7.1dB in the entire bandwidth has also been achieved.

Original languageEnglish
Title of host publication2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT
PublisherIEEE
Pages251-254
Number of pages4
ISBN (Print)978-1-4244-1616-5
DOIs
StatePublished - 5 Sep 2008
Event2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT - Hsinchu, Taiwan
Duration: 23 Apr 200825 Apr 2008

Publication series

Name2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT

Conference

Conference2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT
CountryTaiwan
CityHsinchu
Period23/04/0825/04/08

Keywords

  • LNA
  • Low-noise amplifier and shunt-peaking
  • RFIC
  • Ultra-wideband
  • UWB

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