CMOS dual-wideband low-noise amplifier in 3.1GHz-4.9GHz and 6.0GHz-10.3GHz for ultra-wideband wireless receiver

Zhe Yang Huang*, Che Cheng Huang, Chun Chieh Chen, Chung-Chih Hung

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

In this paper a CMOS dual-wideband low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver radio system. The design consists of a wideband input impedance matching network, two stage cascode amplifiers with shunt-peaked load, a notch filter and an output buffer for measurement purpose. It is simulated in TSMC 0.18um standard RF CMOS process. The LNA gives 13.66dB maximum power gain between 3.0GHz-4.9GHz and 10.34dB maximum power gain between 6.0GHz-10.3GHz while consuming 24.07mW through a 1.8V supply. Over the 3.1GHz-4.9GHz frequency band and the 6.0GHz-10.3GHz, a minimum noise figure is 2.6dB and 3.8dB. Input return loss lower than - 8.31dB in all bandwidth have been achieved.

Original languageEnglish
Title of host publication2007 International Symposium on Integrated Circuits, ISIC
Pages418-421
Number of pages4
DOIs
StatePublished - 1 Dec 2007
Event2007 International Symposium on Integrated Circuits, ISIC - Singapore, Singapore
Duration: 26 Sep 200728 Sep 2007

Publication series

Name2007 International Symposium on Integrated Circuits, ISIC

Conference

Conference2007 International Symposium on Integrated Circuits, ISIC
CountrySingapore
CitySingapore
Period26/09/0728/09/07

Keywords

  • LNA and low-noise amplifier
  • Notch filter
  • RFIC
  • Ultra-wideband
  • UWB

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    Huang, Z. Y., Huang, C. C., Chen, C. C., & Hung, C-C. (2007). CMOS dual-wideband low-noise amplifier in 3.1GHz-4.9GHz and 6.0GHz-10.3GHz for ultra-wideband wireless receiver. In 2007 International Symposium on Integrated Circuits, ISIC (pp. 418-421). [4441887] (2007 International Symposium on Integrated Circuits, ISIC). https://doi.org/10.1109/ISICIR.2007.4441887