@inproceedings{e4f5e38d3e3a4f34ae38ba9ea4311127,
title = "CMOS downscaling and process induced damages",
abstract = "The progress of electronic circuits has been made by the downsizing of its components such as MOSFETs. Recently, CMOS downsizing has been accelerated very aggressively, and even transistor operation of a 6 nm gate length p-channel MOSFET has been reported. However, many serious problems are expected for implementing such small-geometry MOSFETs into large scale integrated circuits, and it is still questionable whether we can successfully introduce sub-10 nm CMOS LSIs into the market or not. In this paper, past and expected future trends of CMOS downscaling are described including the issue of process-induced damage.",
author = "H. Iwai",
year = "2003",
doi = "10.1109/PPID.2003.1199718",
language = "English",
series = "International Symposium on Plasma Process-Induced Damage, P2ID, Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1--11",
editor = "Koji Eriguchi and S. Krishnan and Terence Hook",
booktitle = "2003 8th International Symposium on Plasma- and Process-Induced Damage, P2ID 2003",
address = "United States",
note = "null ; Conference date: 24-04-2003 Through 25-04-2003",
}