Circuit solutions on ESD protection design for mixed-voltage I/O buffers in nanoscale CMOS

Ming-Dou Ker*, Chang Tzu Wang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

Electrostatic discharge (ESD) protection for mixed-voltage I/O interfaces has been one of the major challenges of system-on-a-chip (SOC) implementation in nanoscale CMOS processes. Moreover, the gate leakage current across thin gateoxide devices has serious degradation on circuit performance while circuits implementing in nanoscale CMOS processes. The on-chip ESD protection circuit for mixed-voltage I/O buffers should meet the gate-oxide reliability constraints and be designed with consideration of gate leakage current. This paper presents the effective ESD protection scheme with circuit solutions to protect the mixed-voltage I/O buffers in nanoscale CMOS processes against ESD stresses. The proposed ESD protection scheme and the specific ESD clamp circuits with low standby leakage current have been successfully verified in nanoscale CMOS processes. Effective on-chip ESD protection scheme should be early planed and started in the beginning phase of chip design in order to achieve good enough ESD robustness for IC products.

Original languageEnglish
Title of host publication2009 IEEE Custom Integrated Circuits Conference, CICC '09
Pages689-696
Number of pages8
DOIs
StatePublished - 1 Dec 2009
Event2009 IEEE Custom Integrated Circuits Conference, CICC '09 - San Jose, CA, United States
Duration: 13 Sep 200916 Sep 2009

Publication series

NameProceedings of the Custom Integrated Circuits Conference
ISSN (Print)0886-5930

Conference

Conference2009 IEEE Custom Integrated Circuits Conference, CICC '09
CountryUnited States
CitySan Jose, CA
Period13/09/0916/09/09

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    Ker, M-D., & Wang, C. T. (2009). Circuit solutions on ESD protection design for mixed-voltage I/O buffers in nanoscale CMOS. In 2009 IEEE Custom Integrated Circuits Conference, CICC '09 (pp. 689-696). [5280728] (Proceedings of the Custom Integrated Circuits Conference). https://doi.org/10.1109/CICC.2009.5280728