Circuit-Simulation-Based Multi-Objective Evolutionary Algorithm for Design Optimization of a-Si:H TFTs Gate Driver Circuits under Multilevel Clock Driving

Sheng Chin Hung, Chien Hsueh Chiang, Yi-ming Li

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

This work optimizes dynamic characteristic of a new amorphous silicon gate (ASG) driver circuit using multi-objective evolutionary algorithm (MOEA) and hydrogenated amorphous silicon (a-Si:H) TFT circuit simulator running on the platform of unified optimization framework (UOF). The ASG driver circuit consisting of 17 a-Si:H TFTs is optimized for the given specifications of the fall time {<} 3 \mu s and the ripple voltage {<} -9 V while simultaneously minimizing the total layout area. More than 50% reductions on the fall time of the ASG driver circuit have been achieved by using the optimization methodology together with a novel three-level clock driving technique. The measured results of the fabricated sample using the optimized parameters confirm the practicability of reported MOEA methodology.

Original languageEnglish
Article number7006637
Pages (from-to)640-645
Number of pages6
JournalIEEE/OSA Journal of Display Technology
Volume11
Issue number8
DOIs
StatePublished - 1 Aug 2015

Keywords

  • A-Si:H TFTs
  • Amorphous silicon gate driver circuits
  • Display panel design optimization
  • Dynamic characteristic
  • Fall time
  • Multi-objective evolutionary algorithm (MOEA)
  • Unified optimization framework (UOF)

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