Circuit design to achieve whole-chip ESD protection for UXGA/HDTV LCos IC product

Ming-Dou Ker*, Shih Hung Chen, Tang Kui Tseng

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

Abstract

Successful circuit design to achieve the whole-chip electrostatic discharge (ESD) protection for an UXGA/HDTV LCoS IC product with a die size of 20289.6μm × 16841.5μm has been proposed and practically verified in 0.35-μm 3.3V/12V CMOS process. This LCoS IC with both of low-voltage (LV) and high-voltage (HV) ESD protection circuits can sustain ESD stresses of 3.5kV and 200V in human-body-model (HBM) and machine-model (MM) ESD test standards, respectively.

Original languageEnglish
Pages845-848
Number of pages4
StatePublished - 1 Dec 2004
Event2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan
Duration: 6 Dec 20049 Dec 2004

Conference

Conference2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology
CountryTaiwan
CityTainan
Period6/12/049/12/04

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