Chopper-stabilized sigma-delta modulator

Ying Hwi Chang*, Chung-Yu Wu, Tsai Chung Yu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

18 Scopus citations

Abstract

This paper describes a new architecture of the sigma-delta modulators using a chopper-stabilized configuration. It is show that using this new architecture and without any other circuit techniques, a sigma-delta modulator become immune from the contamination of the inherent low frequency noise, such as offset noise, flicker noise, and clock feedthrough noise. The new architecture can be easily designed from the existing architectures without any stability problems. As an example, a second-order sigma-delta modulator is designed by using the new architecture. The simulation results have definitely shown the excellent immunity from the low frequency noise.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherPubl by IEEE
Pages1286-1289
Number of pages4
ISBN (Print)0780312813
DOIs
StatePublished - 1 Jan 1993
EventProceedings of the 1993 IEEE International Symposium on Circuits and Systems - Chicago, IL, USA
Duration: 3 May 19936 May 1993

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2
ISSN (Print)0271-4310

Conference

ConferenceProceedings of the 1993 IEEE International Symposium on Circuits and Systems
CityChicago, IL, USA
Period3/05/936/05/93

Fingerprint Dive into the research topics of 'Chopper-stabilized sigma-delta modulator'. Together they form a unique fingerprint.

Cite this