Charge-trap memory device fabricated by oxidation of Si 1-x Ge x

Ya Chin King*, Tsu Jae King, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalArticle

239 Scopus citations

Abstract

In this work, we describe a novel technique of fabricating germanium nanocrystal quasinonvolatile memory device. The device consists of a metal-oxide-semiconductor field-effect transistor (MOSFET) with Ge charge-traps embedded within the gate dielectric. The trap formation method provides for precise control of the thicknesses of the top (control) and bottom (tunneling) oxide layers which sandwich the charge-traps, via thermal oxidation. This memory device exhibits write/erase speed/voltage and retention time superior to previously reported nano-crystal or charge-trap memory devices. A detailed description of the novel process for fabricating the Ge charge-trap MOS memory is given, along with the resultant memory-cell performance characteristics.

Original languageEnglish
Pages (from-to)696-700
Number of pages5
JournalIEEE Transactions on Electron Devices
Volume48
Issue number4
DOIs
StatePublished - 1 Apr 2001

Keywords

  • Charge-trap memory
  • Ge nano-crystal

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