Abstract
Plasma etching of poly-silicon in a metal-oxide-semiconductor field-effect transistor (MOSFET) during the gate definition process induces edge damage at the gate-drain overlap edge. This edge damage will be further enhanced by the antenna effect and cause a more serious hot-carrier (HC) effect, particularly in short-channel devices. We call this phenomenon the plasma-charging-enhanced HC effect. In this paper, this plasma-charging-enhanced HC effect is evaluated by the charge pumping (CP) profiling technique, in which the enhanced damage at the gate-drain overlap gate oxide region can be identified. A three-phase plasma damage mechanism is then proposed to explain the observed effect. According to experimental results, it was shown that the interface traps generated at the gate-drain overlap edge are mainly attributed to the plasma-charging-enhanced HC effect. These interface traps (Nit) become the dominant mechanism of the drain current (ID) degradation, which increases with a reducing channel length (L). Again, the enhanced HC-effect-induced-degradation will dominate the device reliability under long-term operations.
Original language | English |
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Pages (from-to) | 4493-4499 |
Number of pages | 7 |
Journal | Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers |
Volume | 41 |
Issue number | 7 A |
DOIs | |
State | Published - 1 Jul 2002 |
Keywords
- Antenna effect
- Charge pumping profiling technique
- Device reliability
- Interface trap generation
- Plasma edge damage
- Plasma etching
- Plasma-charging enhanced hot-carrier effect
- Three-phase plasma damage mechanism