Characterizing a single hot-electron-induced trap in submicron MOSFET using random telegraph noise

P. Fang*, K. K. Hung, P. K. Ko, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

7 Scopus citations

Abstract

Individual interface traps generated by hot-electron stress were observed for the first time. Single trap filling and emptying can cause 0.1% step noise in drain current due to coulombic scattering. Trap location (3-10 Å from interface), time constant, energy and escape frequency are found to be very different from pre-stress (process-induced) traps. Random telegraph (RTS) noise was found to be a useful tool for studying stress-induced interface traps. It is more easily observable for stress-induced traps than process-induced traps due to the small stress area and low stress-induced trap density after light stressing. Using RTS as a characterization tool, it was found that the stress-induced traps are located closer to the interface, and therefore have a shorter time constant and much stronger influence on scattering and ΔId than process-induced traps. RTS only reveals those traps near the Fermi level, while the DC MOSFET IV degradation is also influenced by all the charged traps.

Original languageEnglish
Article number5727456
Pages (from-to)37-38
Number of pages2
JournalDigest of Technical Papers - Symposium on VLSI Technology
DOIs
StatePublished - 1 Dec 1990
Event1990 Symposium on VLSI Technology - Honolulu, HI, United States
Duration: 4 Jun 19907 Jun 1990

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