Characterization on ESD devices with test structures in silicon Germanium RF BiCMOS process

Ming-Dou Ker*, Woei Lin Wu, Chyh Yih Chang

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations

Abstract

Different electrostatic discharge (ESD) devices in a 0.35-μm silicon germanium (SiGe) RF BiCMOS process are characterized in detail by transmission line pulse (TLP) generator and ESD simulator for on-chip BSD protection design. The test structures of diodes with different p-n junctions and the silicon-germanium heterojunction bipolar transistors (HBTs) with different layout parameters have been drawn for investigating their ESD robustness. The human-body-model (HBM) ESD robustness of SiGe HBTs with the optional low-voltage (LV), Hgh-voltage (HV), and high-speed (HS) implantations has been measured and compared in the experimental test chips.

Original languageEnglish
Pages7-12
Number of pages6
StatePublished - 12 Jul 2004
EventProceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004) - Awaji, Japan
Duration: 22 Mar 200425 Mar 2004

Conference

ConferenceProceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004)
CountryJapan
CityAwaji
Period22/03/0425/03/04

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