Characterization ofglobal inversion layer in thin-gate-oxide deep-submicron p-MOSFETS

Bin Yu*, Kiyotaga Imai, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review


A simple electrical method is presented for the characterization of the inversion layer in p-channel MOSFET's with either p+ poly gate (surface-channel, SC) or n+ poly gate (buried-channel, BC). The dc centroid of the inversion layer profile, Xc, represents the effective thickness of the inversion layer in the SC device or the physical location of the buried-channel in the BC device. For the first time, it is well demonstrated that, based on the small-signal gate-to-channel capacitance measurement, the global inversion layer hole profiles in both types of p-MOSFET's can be constructed from three elements, i.e., Xc (dc centroid), Xw (band diagram characteristic width) and ΔNinv (increment of net carrier area density).

Original languageEnglish
Pages (from-to)401-404
Number of pages4
JournalSolid-State Electronics
Issue number3
StatePublished - 30 Mar 1998

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