In this study, pulsed-laser deposited (Pb,Sr)TiO3 (PSrT) films on p-type Si were studied at low substrate temperatures ranging from 300 to 450 °C for metal/ferroelectric/semiconductor applications. The substrate temperature strongly enhances film crystallinity without significant inter-diffusion at the PSrT/Si interface and affects the electrical properties. As the substrate temperature increases, the films have smaller leakage currents, fewer trap states at the electrode interfaces, clockwise capacitance versus applied field hysteresis loops and larger memory windows correlated with superior crystallinity. Conversely, 300 °C-deposited films exhibit a small and counterclockwise loop with a positive shift of the flatband voltage, attributed to more negative trap charges within the films. However, the high substrate temperature (450 °C) may produce serious Pb-O volatilization, incurring more defects and leakage degradation. The analyses of fixed charge density and flatband voltage shift reveal the trap status and agree well with the leakage characteristic. An electron band model of the Pt/PSrT/Si electronic structure is proposed to explain the electrical behaviour. The excellent fatigue endurance with a small variation of memory windows (<11%) after 10 10 switching is also demonstrated.