Characteristics of Gate-All-Around Junctionless Poly-Si TFTs With an Ultrathin Channel

Hung Bin Chen, Chun-Yen Chang, Nan-Heng Lu, Jia-Jiun Wu, Ming Hung Han, Ya-Chi Cheng, Yung Chun Wu

Research output: Contribution to journalArticle

24 Scopus citations

Abstract

This letter demonstrates for the first time junctionless (JL) gate-all-around (GAA) poly-Si thin-film transistors (TFTs) with ultrathin channels (2 nm). The subthreshold swing is 61 mV/decade and the ON/OFF current ratio is close to 10(8) because of the excellent gate controllability and ultrathin channel. The JL-GAA TFTs have a low drain-induced barrier lowering value of 6 mV/V, indicating greater suppression of the short-channel effect than in JL-planar TFTs. The cumulative distribution of electrical parameters in JL-GAA is small. Therefore, the proposed JL-GAA TFTs of excellent device characteristics along with simple fabrication are highly promising for future system-on-panel and system-on-chip applications.
Original languageEnglish
Pages (from-to)897-899
Number of pages3
JournalIEEE Electron Device Letters
Volume34
Issue number7
DOIs
StatePublished - Jun 2013

Keywords

  • Gate-all-around (GAA); junctionless (JL); thin-film transistor; ultrathin channel
  • TRANSISTORS

Fingerprint Dive into the research topics of 'Characteristics of Gate-All-Around Junctionless Poly-Si TFTs With an Ultrathin Channel'. Together they form a unique fingerprint.

Cite this