Characteristic of p-Type Junctionless Gate-All-Around Nanowire Transistor and Sensitivity Analysis

Ming Hung Han, Chun-Yen Chang, Yi-Ruei Jhan, Jia-Jiun Wu, Hung Bin Chen, Ya-Chi Cheng, Yung Chun Wu

Research output: Contribution to journalArticlepeer-review

26 Scopus citations

Abstract

The characteristics and sensitivities of p-type junctionless (JL) gate-all-around (GAA) (JLGAA) nanowire transistors are demonstrated by simulating a 3-D quantum transport device with a view to their use in CMOS technology. The concentration of dopants in a p-type JL nanowire transistor is not as high as that in an n-type device owing to solid solubility of boron in silicon. However, we can use a midgap material as gate electrode to design an appropriate device threshold voltage. The p-type JLGAA transistor exhibits a favorable on/off current ratio and better short-channel characteristics than a conventional inversion-mode transistor with a GAA structure. Sensitivity analyses reveal that the channel thickness and random dopant fluctuation substantially affect the device performance in terms of threshold voltage (V-th), on current (I-on), and subthreshold slope because of the full depletion condition of the channel. The channel length and oxide thickness have less impact because the short-channel effect is well controlled.
Original languageEnglish
Pages (from-to)157-159
Number of pages3
JournalIEEE Electron Device Letters
Volume34
Issue number2
DOIs
StatePublished - Feb 2013

Keywords

  • Gate-all-around (GAA); junctionless (JL); nanowire transistor; sensitivity
  • ELECTRON

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