CAPACITANCE MEASUREMENT TECHNIQUE IN HIGH DENSITY MOS STRUCTURES.

Hiroshi Iwai; Susumu Kohyama

doi:10.1109/iedm.1980.189802

CAPACITANCE MEASUREMENT TECHNIQUE IN HIGH DENSITY MOS STRUCTURES.

Hiroshi Iwai^*, Susumu Kohyama

^*Corresponding author for this work

International College of Semiconductor Technology

Research output: Contribution to journal › Conference article › peer-review

9 Scopus citations

Abstract

A precise capacitance measurement technique is described. This technique is based on a principle of capacitively divided ac voltage measurement. In test devices, reference and test capacitors are connected in series, and intermediate node signal is monitored by on chip linear sense amplifier. Utilizing the technique, various capacitances were measured, and quantitative compared with a two dimensional numerical analysis. The results indicate that the technique is practical and accurate for evaluating capacitive elements in VLSI's.

Original language	English
Pages (from-to)	235-238
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
DOIs	https://doi.org/10.1109/iedm.1980.189802
State	Published - 1980
Event	Tech Dig Int Electron Devices Meet - Washington, DC, USA Duration: 8 Dec 1980 → 10 Dec 1980

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title = "CAPACITANCE MEASUREMENT TECHNIQUE IN HIGH DENSITY MOS STRUCTURES.",

abstract = "A precise capacitance measurement technique is described. This technique is based on a principle of capacitively divided ac voltage measurement. In test devices, reference and test capacitors are connected in series, and intermediate node signal is monitored by on chip linear sense amplifier. Utilizing the technique, various capacitances were measured, and quantitative compared with a two dimensional numerical analysis. The results indicate that the technique is practical and accurate for evaluating capacitive elements in VLSI's.",

author = "Hiroshi Iwai and Susumu Kohyama",

year = "1980",

doi = "10.1109/iedm.1980.189802",

language = "English",

pages = "235--238",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "null ; Conference date: 08-12-1980 Through 10-12-1980",

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TY - JOUR

T1 - CAPACITANCE MEASUREMENT TECHNIQUE IN HIGH DENSITY MOS STRUCTURES.

AU - Iwai, Hiroshi

AU - Kohyama, Susumu

PY - 1980

Y1 - 1980

N2 - A precise capacitance measurement technique is described. This technique is based on a principle of capacitively divided ac voltage measurement. In test devices, reference and test capacitors are connected in series, and intermediate node signal is monitored by on chip linear sense amplifier. Utilizing the technique, various capacitances were measured, and quantitative compared with a two dimensional numerical analysis. The results indicate that the technique is practical and accurate for evaluating capacitive elements in VLSI's.

AB - A precise capacitance measurement technique is described. This technique is based on a principle of capacitively divided ac voltage measurement. In test devices, reference and test capacitors are connected in series, and intermediate node signal is monitored by on chip linear sense amplifier. Utilizing the technique, various capacitances were measured, and quantitative compared with a two dimensional numerical analysis. The results indicate that the technique is practical and accurate for evaluating capacitive elements in VLSI's.

UR - http://www.scopus.com/inward/record.url?scp=0019245348&partnerID=8YFLogxK

U2 - 10.1109/iedm.1980.189802

DO - 10.1109/iedm.1980.189802

M3 - Conference article

AN - SCOPUS:0019245348

SP - 235

EP - 238

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

SN - 0163-1918

Y2 - 8 December 1980 through 10 December 1980

ER -

CAPACITANCE MEASUREMENT TECHNIQUE IN HIGH DENSITY MOS STRUCTURES.

Abstract

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