BSIM - SPICE models enable FinFET and UTB IC designs

Navid Paydavosi*, Sriramkumar Venugopalan, Yogesh Singh Chauhan, Juan Pablo Duarte, Srivatsava Jandhyala, Ali M. Niknejad, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

82 Scopus citations

Abstract

Two turn-key surface potential-based compact models are developed to simulate multigate transistors for integrated circuit (IC) designs. The BSIM-CMG (common-multigate) model is developed to simulate double-, triple-, and all-Around-gate FinFETs and it is selected as the world's flurst industry-standard compact model for the FinFET. The BSIM-IMG (independent-multigate) model is developed for independent double-gate, ultrathin body (UTB) transistors, capturing the dynamic threshold voltage adjustment with back gate bias. Starting from long-channel devices, the basic models are flurst obtained using a Poisson-carrier transport approach. The basic models agree with the results of numerical two-dimensional device simulators. The real-device effects then augment the basic models. All the important real-device effects, such as shortchannel effects (SCEs), quantum mechanical confinement effects, mobility degradation, and parasitics are included in the models. BSIM-CMG and BSIM-IMG have been validated with hardware silicon-based data from multiple technologies. The developed models also meet the stringent quality assurance tests expected of production level models.

Original languageEnglish
Article number6514968
Pages (from-to)201-215
Number of pages15
JournalIEEE Access
Volume1
DOIs
StatePublished - 1 Jan 2013

Keywords

  • Double-gate FET
  • FinFET
  • Integrated circuit modeling
  • MOSFET compact model
  • RF FinFET
  • Short-channel effects
  • SPICE
  • Triple-gate FET
  • UTB-SOI
  • UTBB-SOI

Fingerprint Dive into the research topics of 'BSIM - SPICE models enable FinFET and UTB IC designs'. Together they form a unique fingerprint.

Cite this