The continued development of CMOS technology and the emergence of new applications demand continued improvement and enhancement of compact models. This paper outlines the recent work of the BSIM project at the University of California, Berkeley, including BSIM5 research, BSIM4 enhancements, and BSIMSOI development. BSIM5 addresses the needs of nano-CMOS technology and RF high-speed CMOS circuit simulation. BSIM4 is a mature industrial standard MOSFET model with several improvements to meet the technology requirements. BSIMSOI is developed into a generic model framework for PD and FD SOI technology. An operation mode choice, via the calculation of the body potential ΔVbi and body current/charge, helps circuit designers in the trend of the coexistence of PD and FD devices.
|Number of pages||9|
|Journal||Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors|
|State||Published - Mar 2006|
- Compact modeling
- Device physics