BIST for measuring clock jitter of charge-pump phase-locked loops

Jen Chien Hsu*, Chau-Chin Su

*Corresponding author for this work

Research output: Contribution to journalArticle

36 Scopus citations

Abstract

This paper presents a built-in self-test (BIST) circuit that measures the clock jitter of the charge-pump phase-locked loops (PLLs). The jitter-measurement structure is based on a novel time-to-digital converter (TDC) which has a high resolution. A small area overhead is also achieved using the voltage-controlled oscillator and the loop filter of the PLL under test as parts of the TDC. The experiment result shows that the resolution is about 1 ps and that the measurement error is smaller than 20%.

Original languageEnglish
Pages (from-to)276-285
Number of pages10
JournalIEEE Transactions on Instrumentation and Measurement
Volume57
Issue number2
DOIs
StatePublished - 1 Feb 2008

Keywords

  • Analog built-in self-test (BIST)
  • Jitter measurement
  • On-chip measurement
  • Phase-locked loop (PLL) BIST
  • Timeto-digital converter (TDC)

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