BDD based lambda set selection in Roth-Karp decomposition for LUT architecture

Jie Hong Jiang*, Jing Yang Jou, Juinn-Dar Huang, Jung Shian Wei

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

3 Scopus citations

Abstract

Field Programmable Gate Arrays (FPGA's) are important devices for rapid system prototyping. Roth-Karp decomposition is one of the most popular decomposition techniques for Look-Up Table (LUT)-based FPGA technology mapping. In this paper, we propose a novel algorithm based on Binary Decision Diagrams (BDD's) for selecting good lambda set variables in Roth-Karp decomposition to minimize the number of consumed configurable logic blocks (CLB's) in FPGA's. The experimental results on a set of benchmarks show that our algorithm can produce much better results than those of the previous approach.

Original languageEnglish
Pages259-264
Number of pages6
DOIs
StatePublished - 1 Jan 1997
EventProceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC - Chiba, Jpn
Duration: 28 Jan 199731 Jan 1997

Conference

ConferenceProceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC
CityChiba, Jpn
Period28/01/9731/01/97

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