Field Programmable Gate Arrays (FPGA's) are important devices for rapid system prototyping. Roth-Karp decomposition is one of the most popular decomposition techniques for Look-Up Table (LUT)-based FPGA technology mapping. In this paper, we propose a novel algorithm based on Binary Decision Diagrams (BDD's) for selecting good lambda set variables in Roth-Karp decomposition to minimize the number of consumed configurable logic blocks (CLB's) in FPGA's. The experimental results on a set of benchmarks show that our algorithm can produce much better results than those of the previous approach.
|Number of pages||6|
|State||Published - 1 Jan 1997|
|Event||Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC - Chiba, Jpn|
Duration: 28 Jan 1997 → 31 Jan 1997
|Conference||Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC|
|Period||28/01/97 → 31/01/97|