Background calibration of integrator leakage in discrete-time delta-sigma modulators

Su Hao Wu, Jieh-Tsorng Wu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This work develops an integrator-leakage calibration technique for the switched-capacitor integrators in a delta-sigma modulator (DSM). Integrators that are realized with low-gain opamps are lossy. A DSM that uses lossy integrators exhibits a degraded signal-to-quantization-noise ratio. In the calibration of an integrator, its integration leakage is determined in the digital domain, and the leakage compensation is applied to the same integrator in the analog domain. The proposed scheme can be used to calibrate all of the integrators in a discrete-time DSM of any form. It can be performed in the background without interrupting the normal operation of the DSM.

Original languageEnglish
Title of host publication2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013
DOIs
StatePublished - 10 Sep 2013
Event2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013 - Paris, France
Duration: 16 Jun 201319 Jun 2013

Publication series

Name2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013

Conference

Conference2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013
CountryFrance
CityParis
Period16/06/1319/06/13

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