Avalanche Electron Injection in 4-nm Si3N4/8-nm SiO2 Dielectric Structure: Turn-Around Phenomenon and Si-SiO2 Interface Degradation

Leonello Dori, Maurizio Severi, Maurizio Impronta, Jack Yuan Chen Sun, Maurizio Arienzo

Research output: Contribution to journalArticlepeer-review

8 Scopus citations

Abstract

Charge trapping and interface state generation in very thin nitride/oxide (4-nm Si3N4 + 8-nm SiO2) composite gate insulators are studied as a function of gate electrode work function and bottom oxide thickness. The behavior of the trapped positive charge under bias-temperature stress after avalanche electron injection (AEI) is investigated. Evidence is presented that secondary hole injection from the anode (gate/Si3N4 interface) and subsequent trapping near the SiO2/Si interface results in a turnaround of the flatband voltage shift during AEI from the substrate. Just like thermal oxides on Si, slow-state generation near the SiO2/Si interface and boron acceptor passivation in the surface-space charge layer of the Si substrate are also observed after AEI in these nitride/oxide capacitors, and they are found to be strongly related to the secondary hole injection and trapping. Finally, interface state generation can take place with little secondary anode hole injection and is enhanced by the occurrence of hole trapping.

Original languageEnglish
Pages (from-to)177-182
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume37
Issue number1
DOIs
StatePublished - Jan 1990

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