Automatic synthesis flow for voltage rectifiers with impedance consideration

Fang Yu Jhou, Chang Han Wang, Tsung Yueh Wu, Yu Kang Lou, Chien-Nan Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

For radio-frequency (RF) circuits, energy harvesting is one of the research topics in recent years. By converting ambient energy into the required electrical energy, the circuit can still perform its functionality without any extra power source. In RF energy harvesting circuits, the most important part is the rectifier circuit. Therefore, this paper proposes an automated design tool for CMOS multi-stage Dickson rectifiers to generate the required designs from specifications to layout with power and impedance considerations. In this paper, impedance matching has been taken into consideration to have a proper tradeoff between area and performance. Therefore, it can solve the difficulty in previous approaches to match the impedance after design. The proposed automation tool is consisted of two parts, circuit sizing and IC layout, which have been implemented in LINUX already. The generated Tcl layout scripts have been tested in commercial EDA tools and generated the corresponding layout successfully. As demonstrated in the experimental results, this tool is able to generate the required circuits and layouts that satisfy all users' specifications in seconds. It can help users to shorten the complicated RF IC design flow.

Original languageEnglish
Title of host publication2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467394987
DOIs
StatePublished - 31 May 2016
Event2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016 - Hsinchu, Taiwan
Duration: 25 Apr 201627 Apr 2016

Publication series

Name2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016

Conference

Conference2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016
CountryTaiwan
CityHsinchu
Period25/04/1627/04/16

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  • Cite this

    Jhou, F. Y., Wang, C. H., Wu, T. Y., Lou, Y. K., & Liu, C-N. (2016). Automatic synthesis flow for voltage rectifiers with impedance consideration. In 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016 [7482536] (2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT.2016.7482536