Automatic functional vector generation using the interacting FSM model

Chien-Nan Liu, Chia Chih Yen, Jing Yang Jou

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

While the coverage-driven design validation is getting popular, it would be more convenient for users to have an automatic generator that can generate the input patterns to satisfy the coverage requirements. The symbolic techniques can be used to generate the desired input patterns easily for a specific state transition in a FSM. However, it is not practical for real designs because the memory requirement is often unmanageable. In this paper, we propose an automatic pattern generation engine that can overcome the memory issues for large circuits. It can generate all possible input combinations or notify that such cases will never happen for any specific state transitions. Because we can reasonably partition the HDL designs into the interacting FSM model, the peak memory requirement can be significantly reduced by using the "divide and conquer" strategy for those small FSMs. The experimental results show that we can indeed generate the required input patterns with reasonable memory requirement for the designs with thousands of registers.

Original languageEnglish
Title of host publicationProceedings of the IEEE 2001 2nd International Symposium on Quality Electronic Design, ISQED 2001
PublisherIEEE Computer Society
Pages372-377
Number of pages6
ISBN (Electronic)0769510256
DOIs
StatePublished - 1 Jan 2001
Event2nd IEEE International Symposium on Quality Electronic Design, ISQED 2001 - San Jose, United States
Duration: 26 Mar 200128 Mar 2001

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2001-January
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Conference

Conference2nd IEEE International Symposium on Quality Electronic Design, ISQED 2001
CountryUnited States
CitySan Jose
Period26/03/0128/03/01

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