Asymmetric wafer-level polyimide and cu/sn hybrid bonding for 3-d heterogeneous integration

Cheng Hsien Lu, Shu Yan Jhu, Chiao Pei Chen, Bin Ling Tsai, Kuan-Neng Chen*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

A low-temperature wafer-level polyimide/metal asymmetric hybrid bonding structure using Cu/Sn metal and low-curing temperature polyimide is proposed in this paper. The Cu/Sn and polyimide can be bonded simultaneously at 250 °C. An ultrathin nickel (Ni) buffer layer was used to prevent intermetallic compound (IMC) formation during the deposition process of Sn. Moreover, the asymmetric bonding process could not only optimize the metal and polymer deposition processes but also achieve ultrathin bonding. Furthermore, to solve the issue of surface roughness, the window of polymer-to-solder (P/S) thickness ratio from 1.51 to 2.66 was also demonstrated to show the tolerance of polymer hybrid bonding. The specific contact resistances of the bonded structures were generally maintained between 10-7 and 10{-{8}} Omega Ω-cm2, which indicate excellent electrical performance. As a result, the proposed wafer-level asymmetric hybrid bonding is a promising method for future 2.5-D and 3-D integration.

Original languageEnglish
Article number8721684
Pages (from-to)3073-3079
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume66
Issue number7
DOIs
StatePublished - 1 Jul 2019

Keywords

  • Application window
  • Cu/sn
  • Hybrid bonding
  • Low temperature
  • Polyimide
  • Wafer level

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