Clustering and banking are two effective microarchitectural techniques to reduce the complexity of register files in wide-issue microprocessors. In this paper, we develop simple analytical formulae based on cell-based implementations with flip-flops and multiplexers, to describe and analyze the variants of them. We propose a simple inter-cluster communication mechanism with load/store instruction pairs and a novel distributed & ping-pong register organization for very-long-instruction-word (VLIW) DSP cores. In our simulations, the DSP with the proposed register file has comparable performance with state-of-the-art DSPs for popular DSP kernels. However, 76.8% area and 46.9% access time of its equivalent centralized register files are saved in the UMC 0.13μm 1P8M CMOS technology.
|Number of pages||11|
|Journal||International Journal of Electrical Engineering|
|State||Published - 1 May 2006|
- And digital signal processor (DSP)
- Register file
- Very long instruction word (VLIW)