Area-efficient power-rail ESD clamp circuit with SCR device embedded into ESD-transient detection circuit in a 65nm CMOS process

Chih Ting Yeh, Ming-Dou Ker

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An area-efficient power-rail electrostatic discharge (ESD) clamp circuit with silicon-controlled rectifier (SCR) as main ESD clamp device has been proposed and verified in a 65nm CMOS process. By modifying the layout structure, the ESD-transient detection circuit can be totally embedded in the SCR device. From the measured results, the proposed power-rail ESD clamp circuit with SCR width of 45μm can achieve 7kV human-body-model (HBM) and 350V machinemodel (MM) ESD levels under the ESD stress event, while consuming the standby leakage current in the order of nano-ampere at room temperature under the normal circuit operating condition with 1V bias.

Original languageEnglish
Title of host publication2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
DOIs
StatePublished - 15 Aug 2013
Event2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 - Hsinchu, Taiwan
Duration: 22 Apr 201324 Apr 2013

Publication series

Name2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013

Conference

Conference2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
CountryTaiwan
CityHsinchu
Period22/04/1324/04/13

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  • Cite this

    Yeh, C. T., & Ker, M-D. (2013). Area-efficient power-rail ESD clamp circuit with SCR device embedded into ESD-transient detection circuit in a 65nm CMOS process. In 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 [6533801] (2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013). https://doi.org/10.1109/VLDI-DAT.2013.6533801