There are one PTLSCR and one NTLSCR devices in parallel with output PMOS and NMOS devices, respectively, to improve ESD robustness of CMOS output buffer in deep submicron CMOS IC's. PTLSCR (NTLSCR) is merged together with output PMOS (NMOS) device to save layout area for high-density applications. Experimental results show that this proposed CMOS output buffer can sustain up to 4000V (700V) Human-Body-Mode (Machine-Mode) ESD stresses with small layout area in a 0.6-μm CMOS technology with LDD and polycide processes.
|Number of pages||3|
|Journal||Proceedings of the Annual IEEE International ASIC Conference and Exhibit|
|State||Published - 1 Dec 1995|
|Event||Proceedings of the 8th Annual IEEE International ASIC Conference and Exhibit - Austin, TX, USA|
Duration: 18 Sep 1995 → 22 Sep 1995