Architecture design of belief propagation for real-time disparity estimation

Yu Cheng Tseng*, Tian-Sheuan Chang

*Corresponding author for this work

Research output: Contribution to journalArticle

6 Scopus citations

Abstract

Belief propagation based algorithms perform best in disparity estimation but suffer from high computational complexity and storage, especially in message passing. This paper proposes an efficient architecture design with three techniques to solve the problems. For the memory storage, we propose the spinning-message and the sliding-bipartite node plane that can reduce memory cost to 1.2% for image-scale algorithms and 23.4% for block-scale algorithms, when compared to the traditional approach. For the logic complexity, we propose a buffer-free processing element architecture that has 3.6 times hardware efficiency of the previous work. The three proposed techniques could be applied to various belief propagation based algorithms to save significant hardware cost as well as approach real-time speed.

Original languageEnglish
Article number5604299
Pages (from-to)1555-1564
Number of pages10
JournalIEEE Transactions on Circuits and Systems for Video Technology
Volume20
Issue number11
DOIs
StatePublished - 1 Nov 2010

Keywords

  • Belief propagation
  • disparity estimation

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