Application of semiclassical device simulation to trade-off studies for sub-0.1 μm MOSFETs

Claudio Fiegna*, Hiroshi Iwai, Masanobu Saito, Enrico Sangiorgi

*Corresponding author for this work

Research output: Contribution to journalConference article

10 Scopus citations

Abstract

In this work, applicability of established semiclassical (SC) simulation techniques to ultra-short gate MOS devices is discussed and comparisons between experimental data of MOS transistors with gate down to 40 nm and simulation results are reported. Finally, examples of applications to the comparison of different device structures are reported.

Original languageEnglish
Pages (from-to)347-350
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
DOIs
StatePublished - 1994
EventProceedings of the 1994 IEEE International Electron Devices Meeting - San Francisco, CA, USA
Duration: 11 Dec 199414 Dec 1994

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