To keep up with the demand of continuous increase in device densities, the integration of three-dimensional integrated circuits (3D-IC) has become the most probable solution, and the utilization of ultra-fine-pitch microbump has emerged as an essential component of 3D-IC technology. In this study, a Kelvin bump structure was fabricated and resistances measured at different angles on a 20.0 μm microbump were investigated. The microbump resistance at 0°, 60°, 120°, and 180°are 74.7, 45.9, 14.6, and 13.7 mΩ, respectively. These high resistances in microbumps may result in high interconnect resistance and cause resistance/capacitance (RC) delay, and thus lower the electrical performance of 3D-IC. A series of finite-element-model (FEM) was built to analyze the distribution of electric field in microbump. The FEM results have shown that the current is distributed uniformly in the thin solder joint, but current crowding still occurs in the Cu under-bump- metallization (UBM). The finding of the current crowding in the Cu UBM is the main cause of high resistances in the microbump. Thickening the Al trace, for example, from 0.4 μm to 1.5 μm, is a direct solution to reduce the unexpected high microbump resistance. A numerical model which treated solder joints as a resistance network was also performed in this study. For comparison, both FEM and the numerical model show the same trend and agree with the measurement results from Kelvin bump structure. The results all point to one thing: thickening the Al trace turn out to be the most effective approach to reduce high microbump resistance. When the Al trace thickness is increased from 0.8 to 3.0 μm, the microbump resistance is decreased to half of the original value, resulted from the alleviation of current crowding in the Cu UBM.