Analysis and Design of InGaAs Negative-Capacitance FinFETs considering Quantum Capacitance

Shih En Huang, Shih Han Lin, Pin Su

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This work analyzes and optimizes the design with emphasis on the inversion charge characteristics for InGaAs negative-capacitance FinFETs (NC-FinFETs) by using theoretical calculation corroborated with numerical simulation. Our study indicates that, optimized ferroelectric remnant-polarization (Pr) for InGaAs devices can be chosen by the capacitance matching at the optimized sub-band of the inversion capacitance. In addition, the optimized sub-band is different for the InGaAs devices with different fin-width. The Pr optimization of the InGaAs device is also different from the Si device. After the optimization, the quantum-capacitance induced inversion charge loss for InGaAs devices can be mitigated from ∼2.4X to ∼1.1X due to the action of negative capacitance.

Original languageEnglish
Title of host publication2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages20-22
Number of pages3
ISBN (Electronic)9781538665084
DOIs
StatePublished - Mar 2019
Event2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019 - Singapore, Singapore
Duration: 12 Mar 201915 Mar 2019

Publication series

Name2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019

Conference

Conference2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019
CountrySingapore
CitySingapore
Period12/03/1915/03/19

Keywords

  • CMOS
  • InGaAs
  • Negative-capacitance FET
  • Quantum capacitance

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    Huang, S. E., Lin, S. H., & Su, P. (2019). Analysis and Design of InGaAs Negative-Capacitance FinFETs considering Quantum Capacitance. In 2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019 (pp. 20-22). [8731312] (2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDTM.2019.8731312