Analysis and Compact Modeling of Negative Capacitance Transistor with High ON-Current and Negative Output Differential Resistance - Part II: Model Validation

Girish Pahwa, Tapas Dutta, Amit Agarwal, Sourabh Khandelwal, Sayeef Salahuddin, Chen-Ming Hu, Yogesh Singh Chauhan

Research output: Contribution to journalArticlepeer-review

74 Scopus citations

Abstract

In this paper, we show a validation of our compact model for negative capacitance FET (NCFET) presented in Part I. The model is thoroughly validated with the TCAD simulations with respect to ferroelectric thickness scaling and temperature effects. Interestingly, we find that an NCFET with PZT ferroelectric of a large thickness provides a negative output differential resistance in addition to an expected high ON current and a sub-60 mV/decade subthreshold swing. The model is also tested for the Gummel symmetry and its transient capabilities are highlighted through a ring oscillator circuit simulation.

Original languageEnglish
Article number7590009
Pages (from-to)4986-4992
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume63
Issue number12
DOIs
StatePublished - 1 Dec 2016

Keywords

  • Compact modeling
  • Ferroelectric
  • Negative capacitance
  • Transients
  • negative capacitance FET (NCFET)
  • negative differential resistance (NDR)
  • temperature effects

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