Local interconnection and simple synaptic operators are the most attractive features of the CNN for VLSI implementation in high-speed, real-time applications. Several hardware implementations of the CNN have been reported in the literatures. The CMOS VLSI design of a continuous-time shift-invariant CNN with digitally-programmable operators is considered. In addition, the circuits for hardware annealing is included to provide the flexibility of the network in a variety of applications.
|Number of pages||6|
|State||Published - 1 Dec 1994|
|Event||Proceedings of the 3rd IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA-94) - Rome, Italy|
Duration: 18 Dec 1994 → 21 Dec 1994
|Conference||Proceedings of the 3rd IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA-94)|
|Period||18/12/94 → 21/12/94|