Analog layout synthesis with knowledge mining

Po Hsun Wu, Po-Hung Lin, Tsung Yi Ho

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

14 Scopus citations

Abstract

To reduce layout design time, analog layout designers prefer referring to legacy designs and layouts rather than starting from scratch, or thoroughly applying placement and routing tools because legacy layouts contain pretty much design expertise. Therefore, this paper presents the first knowledge-based layout synthesis methodology to generate new layouts by integrating existent design expertise contained in the quality-approved legacy layouts as much as possible. Experimental results show that the proposed methodology with knowledge mining can achieve high layout reusage rate and hence the designers' layout preference can be successfully reserved.

Original languageEnglish
Title of host publication2015 European Conference on Circuit Theory and Design, ECCTD 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages9-12
Number of pages4
ISBN (Electronic)9781479998777
DOIs
StatePublished - 24 Aug 2015
EventEuropean Conference on Circuit Theory and Design, ECCTD 2015 - Trondheim, Norway
Duration: 24 Aug 201526 Aug 2015

Publication series

Name2015 European Conference on Circuit Theory and Design, ECCTD 2015

Conference

ConferenceEuropean Conference on Circuit Theory and Design, ECCTD 2015
CountryNorway
CityTrondheim
Period24/08/1526/08/15

Cite this