A new design methodology is proposed to realize a real cochlea using the multiplexing switched-capacitor (SC) circuits. The proposed technique is based upon the transmission-line model proposed by Zwislocki . At the cost of the increase in the number of clock phases, the decay rate in the transition region of the filter section can be increased by adding only a few components. Therefore, the components and chip area of the designed silicon cochlea can be small. An experimental chip containing four filter sections has been designed and fabricated. The measured frequency responses from the 32-section cochlea formed by cascading nine fabricated chips are consistent with both theoretical calculation results and observed behavior of a real cochlea. Moreover, the designed silicon cochlea has the dynamic range of 67 dB in each section and a low sensitivity to process variations. Thus it is suitable for VLSI (very large scale integration) implementation with the associated neural network.