The proposed analog low-dropout regulator (ALDO) achieves 250nA of ultra-low quiescent current and 130ns of fast transient response simultaneously. The proposed use of an ultralow quiescent current (ULQC) error amplifier to regulate the gate of power MOSFET while the auxiliary digital gate voltage control (DGVC) circuit contributes to the load transient response. Moreover, the switching frequency is dynamically reduced by the frequency modulation after entering the steady state. The line and load regulation rates are 0.14 m V /V and 0.2 1mV/mA, respectively. High current efficiency of 99.91 % and the best merit-of-figure in steady state are achieved.