An RF/baseband FDMA-interconnect transceiver, implemented in 0.18μm CMOS, enables reconfigurability and multiple access for multi-I/Os on a shared bus. The RF/baseband transceiver achieves an aggregate data rate of 3Gb/s/pin (3.6Gb/s/pin) for bi-directional (uni-directional) signaling while dissipating 92mW and occupying 0.65mm 2 .
|Journal||Digest of Technical Papers - IEEE International Solid-State Circuits Conference|
|State||Published - 6 Dec 2005|
|Event||2005 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, United States|
Duration: 6 Feb 2005 → 10 Feb 2005