An online recursive ICA based real-time multichannel EEG system on chip design with automatic eye blink artifact rejection

Jui Chieh Liao, Wei Yeh Shih, Kuan Ju Huang, Wai-Chi  Fang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

This paper presents an online recursive ICA (ORICA) based real-time multi-channel EEG system on chip design with automatic eye blink artifact rejection. Since EEG signals are very feeble, they are easy to be contaminated by artifacts. Among all artifacts, eye blink artifact dose the most significant harm to EEG signals. For acquiring artifact free EEG signals, ICA is a popular method for artifacts extraction. After extraction of ICA, eye blink artifacts are rejected to improve the reliability of EEG applications such as brain computer interfaces (BCIs). To promote the feasibility and convenience of BCIs, a real-time ICA algorithm, ORICA, is adopted in this system. With ORICA, the system immediately finishes each ICA result after each sample time. After each ICA result is generated, the automatic eye blink artifact rejection and inverse ICA are performed to acquire eye blink artifact free EEG signals in realtime. For system portability and high integration, a front-end interface of commercial IC, ADS1298 provided by TI, and Bluetooth interface, UART, are implemented. The system is designed used TSMC 90nm CMOS technology with 8 channels EEG processing in 128 Hz sample rate of raw data and consumes 8.56 mW at 50 MHz clock rate. The design methods of the proposed EEG system are provided in this paper. The performance and processing results of the system are also shown to reach 0.2532 s latency after each EEG sample time.

Original languageEnglish
Title of host publication2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
DOIs
StatePublished - 15 Aug 2013
Event2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 - Hsinchu, Taiwan
Duration: 22 Apr 201324 Apr 2013

Publication series

Name2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013

Conference

Conference2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
CountryTaiwan
CityHsinchu
Period22/04/1324/04/13

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