An on-chip test structure and digital measurement method for statistical characterization of local random variability in a process

Sumit Mukhopadhyay, Keunwoo Kim, Jenkins Keith A., Ching-Cheng Chuang, Kaushik Roy

Research output: Contribution to journalArticlepeer-review

10 Scopus citations

Abstract

This paper presents an on-chip characterization method for random variation in minimum sized devices in nanometer technologies, using a sense amplifier-based test circuit. Instead of analog current measurements required in conventional techniques, the presented circuit operates using digital voltage measurements. Simulations of the test structure using predictive 70 nm and hardware based 0.13 mu m CMOS technologies show good accuracy (error similar to 5%-10%) in the prediction of random variation even in the presence of systematic variations. A test chip is fabricated in 0.13 mu m bulk CMOS technology and measured to demonstrate the operation of the test structure.
Original languageEnglish
Pages (from-to)1951-1963
Number of pages13
JournalIEEE Journal of Solid-State Circuits
DOIs
StatePublished - Sep 2008

Keywords

  • characterization; digital measurement; on-chip test structure; random variation; sense amplifier
  • FLUCTUATIONS

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